1. Field of the Invention
The invention relates to an integrated circuit (IC), and more particularly to low voltage bandgap and sub-bandgap reference circuits.
2. Description of the Related Art
Usually the bandgap reference circuit provides a stable and zero temperature coefficient reference voltage by using PTAT voltage. The PTAT circuit uses delta VBE, i.e. the difference between two base-emitter voltages, VBE1 and VBE2. Thus
xcex94VBE=VBE1xe2x88x92VBE2=VPTATxe2x80x83xe2x80x83(1)
                              Δ          ⁢                      xe2x80x83                    ⁢          VBE                =                              kT            q                    xc3x97          ln          ⁢                      xe2x80x83                    ⁢                      (                          J1              J2                        )                                              (        2        )            
where
k is Boltzmann""s constant,
T is absolute temperature in degree Kelvin, q is electron charge,
J1 and J2 are current densities through the emitter of bipolar transistors T1 and T2.
Reference is made to U.S. Pat. No. 6,016,051 (Can), filed Jan. 18, 2000, FIG. 2 and a description and explanation of that circuit therein. The circuit 200 of that FIG. 2 is reproduced herein as FIG. 1 (prior art), circuit 100. The circuit 100 is an example of using a PTAT circuit to generate a bandgap and sub-bandgap voltage. However, circuit 100 can hardly operate under a supply voltage VCC as low as 1 volt when used in the conventional process of 0.25 um or 0.18 um (um=micrometer) if the desired VREF≅|Vth|, where Vth is the threshold voltage of PMOS or NMOS transistors. The reason can be explained in FIG. 2 (prior art), circuit 100. This circuit substitutes generic current sources IPTAT and IBIAS with transistors M1 and M2 whose gates are driven by current source IBIAS. In FIG. 2 the VSD of PMOS M2 must be greater than
VSGxe2x88x92|Vth| of M2.
Where VSD is the source-drain voltage of M2, and VSG is the source-gate voltage of M2. Thus
VSDxe2x89xa7VSGxe2x88x92|Vth|
where |Vth| is the threshold voltage of PMOS M2.
For circuit 100 to work, the following condition must be achieved.
VSD,M2+VBE+VREF less than VCC
However, if the desired VREF≅0.5 volt, and VBE≅0.5 volt, then usually
VSD,M2+VBE+VREF greater than 1 volt
That is, circuit 100 cannot work at VCC as low as 1 volt.
Using this delta VBE, a correct circuit structure and an appropriate ratio between two resistors, not only a bandgap reference voltage but also a sub-bandgap reference voltage can be generated as will be demonstrated hereinafter. The bandgap reference circuit in accordance with one embodiment of the present invention can operate not only with CMOS technology but also under wide range of power supplies, even under low VCC of about 1V.
Other U.S. Patents, in addition to above referenced U.S. Pat. No. 6,016,051, which relate to the subject at hand are:
U.S. Pat. No. 5,818,292 (Slemmer), U.S. Pat. No. 5,132,556 (Cheng), and U.S. Pat. No. 4,808,908 (Lewis et al.) disclose bandgap reference circuits.
U.S. Pat. No. 5,646,518 (Lakshmikumar et al.), U.S. Pat. No.5,444,219 (Kelly), and U.S. Pat. No. 4,603,291 (Nelson) show patents otherwise related to the subject.
It is an object of the present invention to provide circuits and methods to provide a bandgap and sup-bandgap reference voltage requiring a voltage supply no greater than the voltage drop of a transistor plus the generated bandgap reference voltage.
It is another object of the present invention to provide a bandgap reference voltage which produces a stable and zero temperature coefficient reference voltage.
It is another object of the present invention to utilize the ratio of two resistive circuits or resistive means to generate the bandgap and sup-bandgap reference voltage.
These and many other objects have been achieved by utilizing a new circuit structure where the sum of the PTAT current (IPTAT) and PTVBE current (IPTVBE) are summed in a resistive circuit or resistive means RX to generate the bandgap or sub-bandgap reference voltage. The IPTAT and IPTVBE currents are generated simultaneously in separate current source circuits and each of these currents is then used to gate a transistor, i.e., two transistor are used in the circuit of the preferred embodiment of the present invention. The current of these two transistors is then summed in RX, thus generating the bandgap or sub-bandgap reference voltage. The magnitude of the bandgap or sub-bandgap reference voltage is determined by the ratio of RX and a resistive circuit in the PTVBE current source.
These and many other objects and advantages of the present invention will be readily apparent to one skilled in the art to which the invention pertains from a perusal of the claims, the appended drawings, and the following detailed description of the preferred embodiments.